High Performance Reconfigurable Computing: From Applications to Hardware

Overview

This paper presents their experience in programming Field Programmable Gate Arrays (FPGAs) in the context of high performance digital signal and data processing. In particular, the paper presents the concept of hardware skeletons as a mean to bridge the gap between high level applications and low level hardware, and satisfy the dual requirement of high level design and hardware efficiency. The concept will be illustrated in the context of image/video processing applications among other applications. In using and developing a variety of hardware design tools, the author will finally suggest a multi-language approach to hardware development.