Vendor : Georgia Institute of Technology
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Date:
11/04/2006
Overview
For multimedia processing, modern Instruction-Level Parallel (ILP) processors are faced with limited parallelism and inevitable communication issues, as silicon feature size decreases and pipelines become wider. This paper proposes and evaluates a dynamic optimization mechanism that exploits regular operand distribution patterns in multimedia applications. The proposed methodology; improves performance by recognizing and extracting more parallelism than conventional ILP processors; lowers the burden of operand transport by localizing the communication between instructions based on the operand characteristics; and maintains binary compatibility by applying run-time optimization rather than requiring changes to the ISA, recompilation with a vectorizing compiler, or manual retargeting and optimization.
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