| Title | Date Added | Company | |
|---|---|---|---|
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Using Intel Thread Profiler for Win32 Threads: Philosophy and Theory | 2008-05-02 | Intel |
| In the past, software profiling tools have concentrated on measuring the execution time of functions and procedures within applications. For serial applications this was useful information that guided the programmer to those parts of the code that could most benefit from optimization or threading. For applications that have already been threaded, this type of information often has little value. Information that relates directly to performance issues from threaded and parallel execution is of much more use. This is the first paper in a two-part series that explains what Intel Thread Profiler for Win32 Threads does and how to use it effectively on one's own explicitly threaded applications.
Tags: High Performance Computing |
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Black Belt Itanium Processor Performance: The Foundation (Part 1 of 5) | 2008-04-30 | Intel |
| Many optimizations will automatically be enabled with aggressive compiler flags. However, with a small amount of performance analysis, architectural insight and targeted code modification, the software developer can greatly improve the resulting application performance. Understanding and resolving pointer ambiguation is important on all architectures and will always improve performance, but on Itanium architecture-based processors the payoff can be enormous, and help release the full power of this new architecture.
Tags: Programming Languages, Application Development |
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Planning Considerations for HiperDispatch Mode | 2008-04-02 | IBM |
| For all levels of z/OS, a TCB or SRB may be dispatched on any logical processor of the type required (standard, zAAP or zIIP). A unit of work starts on one logical processor and subsequently may be dispatched on any other logical processor. The logical processors for one LPAR image receive an equal share for equal access to the physical processors under PR/SM LPAR control. For example, if the weight of a logical partition with four logical processors results in a share of two physical processors, or 200%, the LPAR hypervisor will manage each of the four logical processors with a 50% share of a physical processor. All logical processors are used if there is work available, and they typically have similar processing utilizations.
Tags: Mainframes, |
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An Assessment of Leadership Performance With POWER6 Processors and Red Hat Enterprise Linux 5.1 | 2008-01-31 | IBM |
| Compute-intensive performance is increasingly required for today's high-performance environments. The IBM System p 570 with POWER6 processors provides leadership performance and demonstrates excellent scalability moving from one node to four nodes in this environment while providing linear SMP (Symmetric Multiprocessing) scaling and growth for workloads similar to the metrics used here. This paper highlights the exceptional performance on IBM's POWER6 processor-based systems running with the latest Red Hat Enterprise Linux (RHEL) 5.1 operating system, based on recently audited published SPEC CPU2006 and SPECjbb2005 results, including single-system LINPACK metrics on System p 570 4-core, 8-core and 16-core systems. With Simultaneous Multithreading (SMT) support turned on, Linux is easily able to provide effective scheduling support of the 32 processor threads seen on the 16-core 570 system.
Tags: Processors, Linux Server OS |
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Premier IT Magazine: Reinvented Transistors | 2008-01-01 | Intel |
| 45-nm Manufacturing Creating the Next Wave of Quad-Core Processors | |||
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An Innovative Tool to Benchmark Smartphone Operating Systems | 2008-01-01 | Jakajima |
| Jakajima, a knowledge and information provider for the telecom, ICT, and consumer-electronics trade chain, noticed that no real benchmark has been developed for Smartphone Operating Systems, while the importance of the smartphone and its' OS is growing rapidly. Together with Eindhoven University of Technology, Jakajima has developed a benchmark for these Operating systems. With this benchmark, Jakajima and Eindhoven University of Technology offer the market (OS developers, application developers, hardware suppliers, operators etc.) new innovative tools to compare their mobile products and/or applications in an independent way. The benchmark is an ideal tool in any phase of a product; during concept, development and deployment. This paper provides the approach, methodology and some results.
Tags: Application Development |
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Intel Dual-Core HPC Cluster Uses Next-Generation Intel Xeon Processors | 2008-01-01 | Intel |
| Intel has delivered on Moore's Law using dual-core processing to build a 128-node High-Performance Computing (HPC) cluster that delivers theoretical peak performance of 3.2 teraflops and sustained performance of over 2.1 teraflops. Based on off-the-shelf technologies, including the next-generation dual-core Intel Xeon processor and an InfiniBand interconnect, the cluster represents a new era that rapidly increases performance while reducing or holding steady the requirements for power, heat and floor space. Industry collaborators and end-users can access the machine through the Intel Remote Access Service and use it to test-drive their codes and accelerate their move to Intel multi-core computing.
Tags: High Performance Computing |
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Live Migration With AMD-V Extended Migration Technology | 2007-12-17 | Advanced Micro Devices (AMD) |
| Virtual Machine migration is a capability being increasingly utilized in today's enterprise environments. With live migration, a Virtual Machine Monitor (VMM) moves a running Virtual Machine (VM) nearly instantaneously from one server to another for a seamless experience to the end user while maintaining guest uptime. However, if the processors running in the computers in the pre and post migration environment are not identical, live migration can result in unexpected behavior of the guest software. Since the introduction of its AMD64 processor technology in 2003, AMD has worked closely with virtualization software developers to define the functionality necessary to ensure that live migration is possible across a broad range of AMD64 processors.
Tags: Upgrades and Migration, Virtualization |
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Tuning Symantec Brightmail AntiSpam on UltraSPARC T1 and T2 Processor-Powered Servers | 2007-12-07 | Sun Microsystems |
| Electronic mail is a business-critical function in virtually every enterprise, and it is also one that is under constant attack. Well-known viruses such as Melissa, and worms like SoBig have propagated through email and have disrupted user PCs and corporate networks worldwide. Fraudulent email messages find their ways into inboxes and tempt unsuspecting users into divulging personal information at phishing sites. As companies recognize that their intellectual property can easily leave their premises through email messages, filtering outbound and internal messages is becoming as important as protecting an organization from incoming traffic.
Tags: Network Security, Spam - E-mail Fraud - Phishing |
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AMD Stream Computing: Software Stack | 2007-12-06 | Advanced Micro Devices (AMD) |
| Advanced Micro Devices, Inc. (AMD) - a leading global provider of innovative computing solutions - is working with other leading companies and academic institutions worldwide to deliver a complete, accelerated computing ecosystem with software and tools necessary to turn its high performance, low cost, supercomputing vision into reality. AMD's Stream Computing initiative is ushering processing technologies into the accelerated computing era through integration of CPU, GPU and complete software stack. AMD Stream Computing is a first step in harnessing the tremendous processing power the GPU (Stream Processor) for high performance, data-parallel computing in a wide range of business, scientific and consumer applications.
Tags: High Performance Computing |