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 TitleDate AddedCompany
whitepaper Huawei ATCA Blade Server Powered by AMD Opteron Processors2007-10-22 Advanced Micro Devices (AMD)
  When AMD first introduced the AMD Opteron processor with Direct Connect Architecture in 2003, the target market was for servers in the datacenter. Back then, AMD had a new vision for how system memory and I/O interface to the processor core as well as the ability to create the world's first native dual-core and quad-core x86 processors. These technological advances by AMD have also brought out a new metric called "Performance per watt" which is frequently used as a way to measure overall processor effectiveness. Besides the traditional server market, AMD Opteron processors are also being used for high-end embedded applications. The AMD64 superscalar processor family features Direct Connect Architecture with an integrated memory controller, a scalable high-speed HyperTransport technology I/O interface and industry-leading x86 processor performance.

Tags: Blades		   
whitepaper Quantum?Dot?Based Photonic Devices2007-10-01 Fujitsu
  Adopting nanometer-sized semiconductor particles, called quantum dots, in the active regions of photonic devices provides the characteristics specific to 3-dimensional quantum effects. This will greatly improve the performance of photonic devices in many respects. This paper is developing quantum-dot lasers and quantum-dot optical amplifiers through joint research conducted with the University of Tokyo. This paper introduces the development of technology for these devices, along with some recent results. For quantum-dot lasers, one has realized temperature-insensitive direct modulation at a modulation rate of 10 Gb/s in the 1.3-?m wavelength range. The paper has also fabricated high-performance, quantum-dot optical amplifiers with a wide bandwidth of over 100 nm, high gain of 20 dB, and high optical output power of over +20 dBm.   
whitepaper Carbon Nanotube Bumps for Thermal and Electric Conduction in Transistor2007-10-01 Fujitsu
  The continuous miniaturization of semiconductor chips has rapidly improved the performance of semiconductor products. However, thermal issues that affect semi- conductor chips are becoming more serious. For example, heat transfer has become a very serious problem in the CPUs of personal computers; high-frequency High-Power Amplifiers (HPAs) of mobile communication systems; and power control units of hybrid-car motors. To solve this problem, Fujitsu has been developing semi-conductor heat sinks that exploit the high thermal conductivity of Carbon NanoTubes (CNTs). This paper describes the CNT bumps that have been recently developed for transferring heat and electrically connecting the source, gate, and drain of the high-power, flip-chip amplifiers of mobile communication base stations.

Tags: Mobile - Wireless Communications		   
whitepaper New Ferroelectric Material for Embedded FRAM LSIs2007-10-01 Fujitsu
  The strong growth of information network infrastructures in the society has enabled personal authentication services for electronic money systems and ticketless trans- portation services to become firmly established. Secure, high-speed, and low power consumption nonvolatile memories will be required for mobile devices used with smart RFID tags and secure IC cards. Ferroelectric Random Access Memory (FRAM) is one of the best choices for these applications. Market needs must be paid attention for these mobile and secure applications.   
whitepaper Statistical Static Timing Analysis Technology2007-10-01 Fujitsu
  With CMOS technology scaling down to the nanometer realm, process variations have been increased. In particular, the increase of delay variations has seriously affected the design periods and timing yields. To estimate more accurately these delay variations, Statistical Static Timing Analysis (SSTA), which considers delay variations statistically, has been proposed. SSTA is expected to shorten the design Turnaround Time (TAT) and predict the timing yields. Research on practical applications of SSTA has already been conducted at Fujitsu Laboratories. The paper has developed SSTA tools for use in designs for processors and Application Specific Integrated Circuits (ASICs) in cooperation with Fujitsu and Fujitsu VLSI. This paper describes the delay variations and basic SSTA techniques and introduces SSTA applications to Fujitsu's processor and ASIC design flows.

Tags: Data Mining - Analysis		   
whitepaper Intel Centrino Pro and Intel vProProcessor Technology2007-09-05 Intel
  Remotely manage both wired and wireless PCs from the same IT console to increase security and simplify system management A new generation of notebook and desktop PCs provides proactive security, enhanced maintenance, and improved remote management. Notebook PCs with Intel Centrino Pro processor technology and desktop PCs with Intel vPro processor technology deliver down-the-wire security and manageability capabilities even if hardware (such as a hard drive) has failed, the operating system is unresponsive, software agents are disabled, a desktop PC's power is off, or a notebook's management agents have been disabled. Desktop PCs also include support for virtual appliances that allows IT managers to isolate and protect critical security and management applications in a tamper-resistant environment. In addition, the new generation of notebook and desktop systems delivers significantly improved performance for compute-intensive tasks all in a power-efficient package that is Microsoft Windows Vista* ready.   
whitepaper SAS 9.1.3 SP4 on IBM System p 570 POWER6 Processor-Based Server2007-09-01 IBM
  IBM System p 570 is powered by the 64-bit, 4.7 GHz, IBM POWER6 processors. The POWER6 processor is the next generation of the IBM POWER5 family of microprocessors. The IBM System p 570 server with IBM AIX Version 5.3 operating system demonstrated impressive performance, scalability and reliability when running the SAS 9 (classic SAS) application in a test environment performed by IBM and SAS.

Tags: Processors, UNIX		   
whitepaper MCA Error Recovery: HP-UX Feature for Recovering From Machine Check Aborts2007-09-01 Hewlett-Packard (HP)
  HP Integrity servers provide superior reliability and availability. Nevertheless, even the best of computers can occasionally experience hardware problems that lead to unplanned downtime. Some of these problems are caused by transient events such as an alpha particle strike on memory, cache, or a processor data structure. Intel Itanium-based servers support an advanced architecture that allows the system to contain, correct, and signal machine check errors. Many of these errors are corrected by the platform without operating system intervention. When the platform cannot correct an error, it will be handed off to the operating system. To further enhance the superior reliability of HP Integrity servers, the HP-UX MCA Error Recovery feature adds the ability to recover from some of these Machine Check Aborts (MCAs).

Tags: HP-UX		   
whitepaper Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation0000-00-00 IBM
  The initial state of a design under verification has a major impact on the ability of stimuli generators to successfully generate the requested stimuli. For complexity reasons, most stimuli generators use sequential solutions without planning ahead. Therefore, in many cases they fail to produce a consistent stimulus due to an inadequate selection of the initial state. This paper proposes a new method, based on machine learning techniques, to improve generation success by learning the relationship between the initial state vector and generation success. The paper applies the proposed method in two different settings, with the objective of improving generation success and coverage in processor and system level generation. In both settings, the proposed method significantly reduced generation failures and enabled faster coverage.

Tags: Learning Management Systems, 		  
whitepaper ACT: A Cluster Co-Processor for 3G Baseband Wireless0000-00-00 Institute of Electrical and Electronics Engineers
  Architectures for wireless systems have traditionally been designed to meet real-time requirements, t on a limited die area, and operate within a low power budget. These conditions are usually met by implementing compute-intensive operations in an Application Specific Integrated Circuit (ASIC). ASIC design is both expensive and time consuming. ASICs also suffer in that even minor evolutionary changes in the application invoke another ASIC design cycle. In the rapidly evolving wireless communication space these defects are severe. Flexibility can be achieved by reconfigurable architectures, and the ability to use special purpose configurations enhances both performance and energy efficiency. Often reconfigurable systems are based on FPGA devices which compromise both logic speed and power in order to achieve reconfigurability.

Tags: Mobile - Wireless Communications