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 TitleDate AddedCompany
whitepaper Datacenter-on-Chip Architectures: Tera-Scale Opportunities and Challenges2007-08-22 Intel
  The world has entered in an era of Chip MultiProcessor (CMP) platforms, where performance is delivered with the integration of more and more cores on a die. Tera-scale CMP architectures, consisting of several tens of physical cores and hundreds of hardware threads, are highly suitable for throughput computing especially in the server market place. This paper starts by highlighting tera-scale potential in datacenter environments. It shows how a multi-tier datacenter workload that required tens (to hundreds) of platforms in the past can potentially map on to one (or a few) single-socket tera-scale CMP platforms running Virtual Machines (VMs) and thereby creating Datacenter-on-Chip (DoC) architectures.

Tags: Data Center		   
whitepaper Desktop Management: Make The Case0000-00-00 ZDNet UK
  Welcome to the PDF version of ZDNet UK's Intel-sponsored Desktop Management special report. Here, we present an overview of the key issues facing IT managers, examine the blade PC market and ask how quickly, if ever, Windows Vista will establish itself on the corporate desktop.

Tags: 		  
whitepaper Scalable Performance for Server Consolidation in Virtualized Environments2007-08-01 Intel
  In Intel IT tests, a four-socket server based on the Quad-Core Intel Xeon processor 7300 series demonstrated scalable, predictable performance with up to 32 consolidated server workloads in Virtual Machines (VMs). As the paper added CPU-intensive workloads to the server, average workload runtimes remained approximately constant until one reached 16 VMs. Runtimes then increased at a predictable, linear rate as one continued to add workloads, up to a total of 32. With a dual-socket server based on the Quad-Core Intel Xeon processor 5300 series, runtimes began to increase at about eight VMs, and with a dual-socket server based on the Dual-Core Intel Xeon processor 5100 series, runtimes began to increase at about four VMs.

Tags: Server Consolidation, Virtualization		   
whitepaper Improving Source Code Security and Quality Using Intel Compilers2007-08-01 Intel
  Compilers diagnostics capabilities have increased rapidly in recent years. Intel C++ and Fortran Compilers provide features that can enhance application security, improve source code quality and reliability. This paper is written for software developers and managers who want to learn the state of the art compiler diagnostic capabilities available in Intel C++ and Fortran Compilers. The Static Verifier, new in Intel Compilers version 10.0, detects incorrect or questionable C, C++, and Fortran source code usage including OpenMP, at compile time. The Static Verifier, together with stack and buffer overflow run time checks can detect certain common security vulnerabilities.

Tags: Programming Languages, Security Management		   
whitepaper The Benefits of Using HP Integrity Servers to Consolidate HP 9000 Servers2007-08-01 TechWise Research
  HP has been shipping HP 9000 servers with PA-RISC microprocessors since about 1990. Since that time, nearly 100 different models of servers have been introduced ranging from single-CPU entry-level machines to enterprise-class Superdome models that support 128 cores. Today, thousands of companies worldwide rely on HP 9000 servers and the HP-UX operating system as key components of their IT infrastructure. Several years ago HP made a strategic decision to consolidate its high performance server product line by replacing servers based on PA-RISC and Alpha chips with HP Integrity servers (which are based on Intel's Itanium processor). HP's current plans are to continue selling HP 9000 systems until at least December 2008.

Tags: Processors, Server Consolidation		   
whitepaper Using Intel VPro Processor Technology in 802.1x Networks2007-08-01 Intel
  PCs based on Intel vPro processor technology include Intel AMT, which provides OOB management capabilities. Built-in 802.1x support is included in Intel AMT version 2.5 for laptops and is expected in Intel AMT version 3.0 for desktop PCs. This support enables enterprises to perform remote remediation of client PCs in 802.1x networks, even when the client OS is down. They have developed a solution that enables the same OOB remediation in 802.1x networks with PCs based on current Intel vPro processor technology that includes Intel AMT version 2.0. Because these PCs typically remain in service for three years or more, expect that this solution will play a useful role.

Tags: Network Security		   
whitepaper Intelligent Perceptual Information Parallel Processing System Controlled by Mathematical AIM Model2007-07-27 University of Tsukuba
  This paper studies an intelligent perceptual information processing system in which plural processing can run in parallel. The proposed mathematical Activation-Input-Modulation (AIM) model controls each execution frequency of plural processing independently based on degrees of stimuli detected by external sensors. When external stimuli are detected by some of external sensors, information processing tasks related to the sensors have a priority to be executed, and the stimuli are stored in a memory system. When no external stimulus is detected, the execution frequencies of almost external information processing decrease, and information stored in the memory system is organized by internal information processors.

Tags: Parallel Processing		   
whitepaper Operating System Scheduling on Heterogeneous Core Systems2007-07-23 Sun Microsystems
  This paper makes a case that a thread scheduler for heterogeneous multicore systems should target three objectives: optimal performance, core assignment balance and response time fairness. Performance optimization via optimal thread-to-core assignment has been explored in the past; this paper demonstrates the need for balanced core assignment. The paper shows that unbalanced core assignment results in completion time jitter and inconsistent priority enforcement; it then presents a simple fix to the Linux scheduler that eliminates these problems. The second part of the paper addresses the problem of building the HMC scheduler that balances all three objectives. This is a difficult optimization problem.

Tags: Software Engineering		   
whitepaper Implementation of Parallel Algorithm "Conveyer Processing" for Images Processing by Filter 'Mean'2007-07-04 Technical University of Sofia
  This paper implements a parallel algorithm for recursive image processing by filter 'Mean'. For implementation of parallel program is used MPI (Message Passing Interface) library. It is shown execution of a program with one and more processors. The program works with 24-bit BMP images. It is made a comparison between sequential and parallel "Conveyer processing" algorithms.

Tags: Parallel Processing, Software Engineering		   
whitepaper Compliance Risk Management2007-07-03 Advanced Micro Devices (AMD)
  The financial services industry is experiencing tremendous growth, diversification and innovation. Derivatives, globalization, product innovation, dynamic markets, and new methods of taking on and managing financial risk are key catalysts to profit growth and evolution. Wide-scale adoption of high-performance computing like that powered by AMD Opteron processors has further accelerated this financial services transformation. Proactive Enterprise Risk Management ("ERM") has become critical in managing the many activities and various risks that a modern financial firm is exposed to. When determining the soundness of an institution, financial regulators are increasingly assessing both the quantity of the firm's ERM initiatives and the quality of its ERM programs and infrastructure. Compliance risk management is an integral component of ERM.

Tags: Security Standards, Cost Control - Risk Mgmt.