| Title | Date Added | Company | |
|---|---|---|---|
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Wireless Universal Serial Bus (WUSB): Greater Convenience and Mobility to Devices | 2006-11-28 | University of California |
| The Universal Serial Bus (USB), with one billion units in the installed base, is the most successful interface in PC history. Projections are for 3.5 billion interfaces shipped by 2006. Benefiting from exceptionally strong industry support from all market segments, USB continues to evolve as new technologies and products come to market. It is already the de facto interconnect for PCs, and has proliferated into Consumer Electronics (CE) and mobile devices as well. Wireless USB will build on the success of wired USB, bringing USB technology into the wireless future. Usage will be targeted at PCs and PC peripherals, consumer electronics and mobile devices.
Tags: Mobile - Wireless Communications |
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DB2 9 pureXML Scalability on Intel Xeon MP Platforms Using IBM N Series Storage | 2006-11-15 | Intel |
| With the recent launch of the next-generation Intel Xeon processor MP, IBM DB2 9, and IBM N Series storage, businesses can now enjoy the rich processing power and performance benefits these products have to offer. This paper unveils the combined performance of Dual-Core Intel Xeon processor 7100? Series, DB2 9 pureXML technology, and IBM N5500 midrange storage servers. Several measurements from an XML-based data server environment are provided to illustrate the performance and scalability of these products.
Tags: Storage Management, XML |
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AMD64 Technology: Providing Storage Customers With a Competitive Advantage | 2006-11-03 | Advanced Micro Devices (AMD) |
| The storage market is breaking away from the legacy model (application servers with islands of difficult-to-manage storage) to on-demand, networked storage where systems are more fault tolerant and accessible. Storage customers are measuring the performance of I/O and data throughput, in addition to reliability, manageability, and scalability. As a result of this evolution, storage manufacturers are finding it can benefit their system design to carefully consider the microprocessor, which has not been historically viewed as a differentiating or value-added component. With systems based on AMD64 technology, storage customers can take advantage of one of the fastest growing business computing platforms and incorporate leading performance, cost savings and ease of management into their storage strategy.
Tags: Storage Management |
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HW-SW Framework for Distributed Parallel Computing on Programmable Chips | 2006-11-02 | Universitat Autonoma de Barcelona |
| This paper addresses a new hardware/software Multi Processor System-on-a-Chip (MPSoC) co-design methodology to map PVM/MPI parallel software framework to a developed multiprocessor architecture for distributed parallel computing on a chip. This methodology is composed of two concurrent phases. The first one is the software development of the embedded parallel framework for on-chip platforms. Parallel Virtual Machine (PVM) and Message Passing Interface (MPI) are two traditional software frameworks for distributed parallel computing, so we need to translate one of them towards the on-chip environment. The goal of the second phase is to develop distributed parallel on-chip hardware architecture, based on Multiprocessor System-On-a-Chip (MPSoC) that includes a Network On-a-Chip (NoC) strategy, together with the corresponding distributed memory subsystem.
Tags: Parallel Processing, Programming Languages |
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Securing Your Future With HP: A Transition Guide for Tru64 UNIX Customers | 2006-12-27 01:00:55 | Hewlett-Packard |
| AlphaServer systems running Tru64 UNIX have provided an excellent solution for delivering the performance, reliability and stability required in the IT environment. Following the Compaq-HP merger, HP concluded that while Tru64 UNIX on AlphaServer is an excellent product, it needed to focus its development investment on only one UNIX version to provide "Best-in-class" enterprise UNIX capabilities. The decision was made to standardize on HP-UX as the enterprise UNIX for Integrity servers, and to provide both AlphaServer customers and HP 9000 customers with a robust enterprise UNIX that delivered the enterprise capabilities they needed. | |||
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Server Consolidation Using Quad-Core Processors | 2006-11-01 | Intel |
| Intel IT used the Quad-Core Intel Xeon processor 5300 series to consolidate test workloads from eight physical machines into Virtual Machines (VMs) running on a single server. The dual-socket server completed the workloads 66 percent faster than the original eight servers based on the Intel Pentium III processor, using 86 percent less power per workload. The quadcore processors were also 34 percent faster than the Dual-Core Intel Xeon processor 5148 running the same consolidated workloads, with workload completion times remaining much more uniform and predictable as the number of workloads increased. The results show the strong potential of the Quad-Core Intel Xeon processor 5300 series for high levels of consolidation and virtualization, particularly with CPU intensive applications.
Tags: Server Consolidation |
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Market Risk and Algorithmic Trading | 2006-10-24 | Advanced Micro Devices (AMD) |
| In the evolving financial markets, ever-more complex quantitative analyses are performed. Some constantly assess the market risk of portfolio exposures, while others calculate the probability of reward for various strategies in the continually shifting markets. Increasingly, algorithmic trading programs automatically execute the trade orders that result. With the growing adoption of the AMD Opteron processor, high performance computing for quantitative modeling and algorithmic trading in the financial markets likely will increase. Simulation modeling techniques quantify market risk, measuring the probability and magnitude of potential loss due to change in prices. As market liquidity decreases, typically price volatility and, hence, market risk increases. With the recent introduction of decimalization, the U.S. equity market structure dramatically changed.
Tags: Online Trading, Cost Control - Risk Mgmt. |
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High Performance Computing: Compatible Acceleration Using Fine Grain, Parallel Processing | 2006-10-24 | CPU Technology |
| In many cases, organizations are not realizing expected performance increases when running large, complex applications on High Performance Computing (HPC) computers. A mismatch between existing computer architectures and the applications running on them is exacerbating the inefficiencies inherent in these systems. Tailoring a computer to meet the specific resource requirements of a group of applications can yield an optimal machine without the massive expense in time and dollars of changing the architecture and rewriting the software. Multi-processor in Memory (MNM) technology, combined with CPU Tech's System-on-a-Chip (SoC) integration, can produce high throughput compatible processing at very low power and cost.
Tags: Parallel Processing, High Performance Computing |
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Quad-Core and Dual-Core Intel Xeon Processor-Based Two-Processor Workstations: Superior Performance to Improve How People Work and Create Every Day | 2006-10-01 | Intel |
| With more complex designs and an overwhelming desire to push the envelope of business, creative, and scientific possibilities, the challenges get tougher every year. Yet, these are what drives one at Intel to take the next leap in technologies so they can reach their objectives. With Intel technologies built into one's work environment, one can build success into the business. Intel continues to build more capabilities into platforms so the user can do much more with a lot less. For over 30 years, Intel has helped developers and businesses solve their toughest problems with advanced computing capabilities and technologies - from the first multi-purpose processor in 1974 to the industry's first quad-core, 64-bit processor-based platforms today.
Tags: Workstations |
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Hardware Support for Spin Management in Overcommitted Virtual Machines | 2006-09-20 | Association for Computing Machinery |
| Multiprocessor Operating Systems (OSs) pose several unique and conflicting challenges to System Virtual Machines (System VMs). For example, most existing system VMs resort to gang scheduling a guest OS's virtual processors (VCPUs) to avoid OS synchronization overhead. However, gang scheduling is infeasible for some application domains, and is inflexible in other domains. In an overcommitted environment, an individual guest OS has more VCPUs than available physical processors (PCPUs), precluding the use of gang scheduling. In such an environment, the authors demonstrate a more than two-fold in-crease in runtime when transparently virtualizing a chip-multiprocessor's cores.
Tags: Virtualization |
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