| Title | Date Added | Company | |
|---|---|---|---|
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Trek Bikes Revolutionizes New Cycling Market by Deploying Innovative Industrial Design Technologies on Trek Lime | 2007-01-25 | Advanced Micro Devices (AMD) |
| Trek Bikes wanted to create a breakthrough, revolutionary concept in bicycle design and develop an untapped North American market of 160 million potential riders. The challenge was to extend the company's market leadership position in a new direction. Trek Bikes deployed innovative industrial design technologies, including SolidWorks 3D CAD software powered by AMD Opteron 64 processors.
Tags: Processors |
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Accelerators for High Performance Computing Investigation | 2007-01-24 | Hewlett-Packard (HP) |
| For many years microprocessor single thread performance has increased at rates consistent with Moore's Law for transistors. In the 1970s-1990s the improvement was mostly obtained by increasing clock frequencies. Clock speeds are now improving slowly and microprocessor vendors are increasing the number of cores per chip to obtain improved performance. This approach is not allowing microprocessors to increase single thread performance at the rates customers have come to expect. After numerous customer requests for more information, a group was formed within HP's High Performance Computing Division to investigate some of these approaches.
Tags: Processors, High Performance Computing |
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Dell H2C Technology: Hybrid Cooling for Overclocked CPUs | 2007-01-23 | Dell |
| H2Ceramic (H2C) cooling is designed for PC enthusiasts and high-end gamers who overclock their CPUs to get top performance. These systems need extra cooling to help avoid failures caused by overheating. H2C extends CPU cooling capacity beyond what is possible with heat sinks and forced-air convection or more conventional liquid cooling systems. H2C uses thermal sensors, electronic controls, and active management of fan speeds and ThermoElectric Cooling (TEC) voltage to keep CPU temperature slightly above ambient room temperature, which prevents the formation of humidity condensation or frost. | |||
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Avaya S8300 and Avaya S8500 Media Server Local Survivable Processor: Issue 4.0 | 2007-01-21 | Avaya |
| This paper presents a discussion about the Avaya S8300 and S8500 Media Server configured as a Local Survivable Processor (LSP). This discussion is intended to describe how the LSP provides the added layer of survivability and how to design a network to take full advantage of the LSP's capabilities. Communication is the life-blood of any company, and ensuring that communications will be available at any time is critical. This is increasingly difficult to provide in today's changing environment from pure voice networks to converged data and voice networks. Avaya offers a strong line of products to assist in creating the most robust network possible. This portfolio of solutions includes the Avaya S87xx Media Server, Avaya S8500 Media Server and the Avaya S8300 Media Server.
Tags: Network Design |
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Hardware Management Console External Connectivity Security for IBM POWER Processor-Based Systems | 2007-01-12 | IBM |
| This paper describes data that is exchanged between the Hardware Management Console (HMC) and the IBM Service Delivery Center (SDC) and the methods and protocols for this exchange. All the functionality that is described in the paper refers to HMC version V6.1.0 and later. The HMC uses various methods for communicating back to IBM to match different client environments.
Tags: IP Technologies, VPNs |
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zAAPs and zIIPs: Increasing the Strategic Value of System z | 2007-01-09 | IBM |
| With the addition of IBM System z application assist processors (zAAPs) and integrated information processors (zIIPs) to the portfolio of special-purpose IBM System z processors, the reinvention of the IBM mainframe continues. Jointly, zAAPs and zIIPs provide significant IBM System z9 integrated and cost-effective processing cycles for nowadays strategic Java and DB2t for z/OS programming platforms which are increasingly fundamental to enterprise-class business environments. Overviews of zAAPs and zIIPs are presented that describe their functionality, design, and use by the z/OS operating system to achieve the execution of both Java and z/OS DB2 programming functions. | |||
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The Future Data Center - Part 1: Multi-Core Processors | 2007-01-08 | Symantec |
| Multi-core microprocessors promise substantially improved system performance with commensurately reduced power and cooling requirements. However, multiprocessor programming can prove a daunting activity and involve a learning curve. Some applications inherently cannot exploit multiprocessing facilities and many applications are extremely difficult to partition into parallel processing architectures. Small wonder that attempts to parallelize existing applications have sometimes been referred to as paralyzing the applications.
Tags: Processors, Data Center |
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System x3755 Technical Introduction | 2007-01-03 | IBM |
| Delivering an industry-leading, 64-bit framework for high performance computing and business computing, the IBM System x3755 is built for speed. The x3755 eliminates system architecture bottlenecks through the use of separate, high-speed links between the processors, main memory, and I/O. The AMD Direct Connect Architecture and HyperTransport technology combined with IBM Xcelerated Memory Technology drive the x3755 to deliver the performance, availability, and manageability needed for the next generation of high performance computing servers that require low latency and high speed access to memory. This paper describes the technical aspects of the server.
Tags: Application Servers, High Performance Computing |
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Enabling BSS Business Process and System Convergence With HP Integrity, HP-UX and HP BladeSystem | 2007-01-01 | Hewlett-Packard (HP) |
| Communications Service Providers are faced with the convergence of voice, data and information technology infrastructure, ongoing mergers and acquisitions, and the constant evolution of services. Intel Itanium 2 processor-based HP Integrity platforms running HP-UX - from 1U rack optimized systems to cabinet-sized symmetric multi-processor systems and now high-performance, high density blade form-factor systems - offer an exciting opportunity to accelerate next-generation BSS infrastructure at an excellent price/performance ratio.
Tags: Blades, HP-UX |
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High-Speed Interconnect and Packaging Design of the IBM System z9 Processor Cage | 2007-01-01 | IBM |
| This paper describes the system packaging and technologies of the IBM System z9 enterprise-class server. The central electronic complex of the system consists of four nodes, each housing a MultiChip Module (MCM) with 16 chips consuming up to 1,200 W. The z9 server doubles the multiprocessor performance of the System z990 by increasing the Central Processing Unit (CPU) configuration and using an internally developed elastic interface to increase interconnect speed on all high-speed buses. High frequencies and massively parallel connectivity lead to a raw packaging bandwidth of up to 1,764 GB/s between processors and cache within a single frame for a fully configured four-node z9 system.
Tags: ASICs - Chip Sets, High Performance Computing |
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