Member Login

E-mail:    Password:  




 TitleDate AddedCompany
whitepaper Improving Source Code Security and Quality Using Intel Compilers2007-08-01 Intel
  Compilers diagnostics capabilities have increased rapidly in recent years. Intel C++ and Fortran Compilers provide features that can enhance application security, improve source code quality and reliability. This paper is written for software developers and managers who want to learn the state of the art compiler diagnostic capabilities available in Intel C++ and Fortran Compilers. The Static Verifier, new in Intel Compilers version 10.0, detects incorrect or questionable C, C++, and Fortran source code usage including OpenMP, at compile time. The Static Verifier, together with stack and buffer overflow run time checks can detect certain common security vulnerabilities.

Tags: Programming Languages, Security Management		   
whitepaper Global Services From Dell Help the BWW Sauber F1 Team Stay on the Fast Track to Success2007-07-30 Dell
  The BMW Sauber F1 Team was a consistent contender for competition points in 2006, in its first year as a newly formed team, and finished fifth overall. The BMW Sauber F1 Team needed a reliable IT partner that could provide support services in 15 different countries throughout the competitive year. BMW Sauber F1 Team began working with Dell in May 2006. Since then, the two companies have not only designed and deployed new pit and production systems, but implemented a support service to ensure that, if an issue arises, a Dell technician is onsite within one hour, no matter the location.

Tags: Windows XP, Laptops		   
whitepaper Intelligent Perceptual Information Parallel Processing System Controlled by Mathematical AIM Model2007-07-27 University of Tsukuba
  This paper studies an intelligent perceptual information processing system in which plural processing can run in parallel. The proposed mathematical Activation-Input-Modulation (AIM) model controls each execution frequency of plural processing independently based on degrees of stimuli detected by external sensors. When external stimuli are detected by some of external sensors, information processing tasks related to the sensors have a priority to be executed, and the stimuli are stored in a memory system. When no external stimulus is detected, the execution frequencies of almost external information processing decrease, and information stored in the memory system is organized by internal information processors.

Tags: Parallel Processing		   
whitepaper Operating System Scheduling on Heterogeneous Core Systems2007-07-23 Sun Microsystems
  This paper makes a case that a thread scheduler for heterogeneous multicore systems should target three objectives: optimal performance, core assignment balance and response time fairness. Performance optimization via optimal thread-to-core assignment has been explored in the past; this paper demonstrates the need for balanced core assignment. The paper shows that unbalanced core assignment results in completion time jitter and inconsistent priority enforcement; it then presents a simple fix to the Linux scheduler that eliminates these problems. The second part of the paper addresses the problem of building the HMC scheduler that balances all three objectives. This is a difficult optimization problem.

Tags: Software Engineering		   
whitepaper Implementation of Parallel Algorithm "Conveyer Processing" for Images Processing by Filter 'Mean'2007-07-04 Technical University of Sofia
  This paper implements a parallel algorithm for recursive image processing by filter 'Mean'. For implementation of parallel program is used MPI (Message Passing Interface) library. It is shown execution of a program with one and more processors. The program works with 24-bit BMP images. It is made a comparison between sequential and parallel "Conveyer processing" algorithms.

Tags: Parallel Processing, Software Engineering		   
whitepaper Compliance Risk Management2007-07-03 Advanced Micro Devices (AMD)
  The financial services industry is experiencing tremendous growth, diversification and innovation. Derivatives, globalization, product innovation, dynamic markets, and new methods of taking on and managing financial risk are key catalysts to profit growth and evolution. Wide-scale adoption of high-performance computing like that powered by AMD Opteron processors has further accelerated this financial services transformation. Proactive Enterprise Risk Management ("ERM") has become critical in managing the many activities and various risks that a modern financial firm is exposed to. When determining the soundness of an institution, financial regulators are increasingly assessing both the quantity of the firm's ERM initiatives and the quality of its ERM programs and infrastructure. Compliance risk management is an integral component of ERM.

Tags: Security Standards, Cost Control - Risk Mgmt.		   
whitepaper Intel Threading Building Blocks: Why Threading Building Blocks?2007-07-01 O'Reilly Media
  Intel Threading Building Blocks offers a rich and complete approach to expressing parallelism in a C++ program. It is a library that helps one leverage multi-core processor performance without having to be a threading expert. Threading Building Blocks is not just a threads-replacement library;it represents a higher-level, task-based parallelism that abstracts platform details and threading mechanisms for performance and scalability. This paper introduces Intel Threading Building Blocks and how it stands out relative to other options for C++ programmers. Although Threading Building Blocks relies on templates and the C++ concept of generic programming, this paper does not require any prior experience with these concepts or with threading.

Tags: Application Development, Programming Languages		   
whitepaper Multi-Core Intel Architecture Enables Eaton to Quadruple the Data Channels in Its Transmission Testing Systems2007-07-01 Intel
  Deep inside Eaton Corporation is a team of developers whose sole mission is to refine the test and measurement systems used by the company's Truck Group R&D team. This case study explains how these developers harnessed the performance of new multi-core Intel processors and the multithreaded architecture of National Instruments LabVIEW graphical programming software to quadruple the number of channels running through their systems and achieve real-time determinism. They got there using standard, off-the-shelf desktop systems, keeping power consumption, thermal output and - most importantly - costs, down. Eaton's move to Intel's multi-core processors also allowed them to put their system in a mobile platform so that testing can be done in the vehicle instead of in dynamometers for more accurate, efficient performance feedback.

Tags: GUI		   
whitepaper Accelerating the Transformation: Intel's Leadership in Embedded Systems, Communications and Networking Maximizes Innovation and Choice for Network-Centric Warfare2007-07-01 Intel
  Intel's broad range of innovative, modular and standards-based technologies enable the Department of Defense (DoD) and its vendors to apply innovations which cost-effectively implement the network-centric vision. Based on proven leadership in modular embedded systems, communications and networking architectures, Intel is uniquely qualified to help integrators deliver standards-based Commercial Off-The-Shelf (COTS) solutions capable of accelerating the ongoing process of force transformation.

Tags: Embedded Systems		   
whitepaper Extreme High Performance Computing or Why Microkernels Suck2007-06-30 SGI
  One often wonders how well Linux scales. The suggestions frequently received say that Linux cannot scale because it is a monolithic operating system kernel. However, microkernels have never scaled well and Linux has been scaled up to support thousands of processors, terabytes of memory and hundreds of petabytes of disk storage which is the hardware limit these days. Some of the techniques used to make Linux scale were per cpu areas, per node structures, lock splitting, cache line optimizations, memory allocation control, scheduler optimizations and various other approaches. These required significant detail work on the code but no change in the general architecture of Linux. This paper gives an overview of why Linux scales and shows the hurdles microkernels would have to overcome in order to do the same.

Tags: Linux - Open Source, High Performance Computing