Two-Level BEOL Processing for Rapid Iteration in MRAM Development

Overview

The implementation of Magnetic Random Access Memory (MRAM) hinges on complex magnetic film stacks and several critical steps in Back-End-Of-Line (BEOL) processing. Although intended for use in conjunction with silicon CMOS front-end device drivers, MRAM performance is not limited by CMOS technology. This paper reports on a novel test site design and an associated thin-film process integration scheme which permit relatively inexpensive, rapid characterization of the critical elements in MRAM device fabrication. The approach described in this paper provides an inexpensive means for rapidly iterating on MRAM development alternatives to converage on an implementation suitable for a production environment.